Semiconductor wafers such as monocrystalline silicon wafers are used to manufacture integrated circuits. The wafers are formed by slicing a cylindrical crystalline ingot into thin disc-shaped wafers. The square edges of the sliced wafers are rounded to reduce mechanical defects, such as edge chipping and cracking, that can occur during handling of the wafer. The rounding can be performed by a grinding process that utilizes a wafer edge grinding wheel. Because edge chipping and cracking can increase stress and facilitate the onset of wafer breakage or deformation during thermal processing, the rounding will improve wafer yields. Typically a larger radius of edge rounding leads to more mechanical stability.
Wafers are available in sizes that range from 25 millimeters (1 inch) to 300 millimeters (12 inches) and have corresponding thicknesses that range from 300 microns to 800 microns. If the wafers require thinning during the manufacturing process, the stress reduction benefit of the original rounding of the thick wafer edge will be lost if the value of the final thickness goes below the radius of the original edge rounding. For example, if 300 millimeter wafers have an edge rounding radius of 200 microns and are thinned to a final thickness of 100 microns or less, the resulting sharp wafer edges will be mechanically unstable during subsequent steps in the manufacturing process, thereby leading to increased wafer yield losses.
One approach that has been used is to round the edges of the wafer in proportion to the wafer's expected target thickness after thinning. However, wafers having edges rounded to radius of curvatures that are relatively small in proportion to their initial thickness will be more susceptible to mechanical damage during handling before they are thinned to their target thickness. This problem will become worse over time as semiconductor industry roadmaps for wafer target thicknesses after thinning are already projecting thicknesses that are well below 100 microns.